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CHALLENGE

Stop the 9-12-month delays in a large OEM’s system-level validation of microprocessor and ASIC performance systems. Input/output data performance issues were impacting time-to-market and causing significant delays while these issues were discovered and corrected.

KEY CHANGES

Used the expertise of the chip teams to develop customized test cards in collaboration with system teams. These custom test cards could identify performance issues or bugs in the architecture before the first full system was prototyped. This enable more robust performance modeling on system prototypes. Hardware, firmware and software could be tested very early in development at the system level.

IMPACT

The changes shaved 20-25% off the development timeline

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